Reconfigurable Platforms: Architectures, CAD tools and Applications

Department of Electrical and Computer Engineering

Title: Reconfigurable Platforms: Architectures, CAD tools and Applications

Prof. Dimitrios Soudris
MicroLab, ECE NTUA, Greece

Friday, 23th May 2014, 16:30 – 17:30
Room XOD 02 – B109, New Campus
University of Cyprus

Abstract: FIELD-Programmable Gate Arrays (FPGAs) have become the implementation medium for the vast majority of modern digital circuits. FPGAs are particularly attractive to industrial sector mainly due to the similarities in the logic mapping and implementation flow with Application-Specific Integrated Circuit (ASIC) flows, as well as the significant shorter time-to-market. Even though reconfigurable technology is widely accepted, still several challenges need to be satisfied in order FPGAs to become a mainstream platform.
Design Methodologies and CAD tools for supporting the design space exploration of reconfigurable architectures, which are implemented in 2D and 3D FPGAs platforms will be presented. Implementation results, starting from the design of a low energy FPGA up to mapping of computationally intensive algorithms.
The shift from horizontal scaling to volumetric stacking of circuits has the potential to mitigate the many limitations of modern integrated circuits. A software-supported framework is developed for designing 3D reconfigurable architectures.

Biography: Dr. Dimitrios Soudris received his Diploma in Electrical Engineering from the University of Patras, Greece, in 1987. He received the Ph.D. Degree in Electrical Engineering, from the University of Patras in 1992. He was working as Lecturer, Assist. and Assoc. Professor in Dept. of Electrical and Computer Engineering, Democritus University of Thrace for thirteen years since 1995. He is currently working as Assistant Professor in School of Electrical and Computer Engineering of National Technical University of Athens, Greece. His research interests include embedded systems design, low power VLSI design and reconfigurable architectures. He has published more than 300 papers in international journals and conferences. Also, he is editor in five books of Kluwer and Springer. He is leader and principal investigator in numerous research projects funded from the Greek Government and Industry as well as the European Commission (ESPRIT II-III-IV and 5th & 7th IST), European Space Agency and ENIAC. He has served as General Chair and Program Chair for the International Workshop on Power and Timing Modeling, Optimization, and Simulation (PATMOS) and the General Chair of IFIP-VLSI-SOC 2008. Also, he received an award from INTEL and IBM for the project results of project LPGD and two HiPEAC awards.